Lateral Trench MOSFET (LTDMOS) devices are power semiconductor devices that may be integrated with control circuitry to form monolithic power integrated circuits (ICs) used in a wide range of applications, including power management ICs. LTDMOS devices consist of large trench areas that are oxidized and filled with polysilicon (“poly”). The poly forms the gate electrode of the LTDMOS, the oxide layer forms the gate oxide, and channel regions are formed on the sidewalls of the silicon trenches. Current generally flows vertically through the channel regions, then laterally through a drift region.
To maximize the density of the LTDMOS channel regions, it is important to minimize the width of the trenches. As a result, the trench poly is generally not wide enough to allow contact by the metallization layer or contact plugs. Prior art LTDMOS devices employ sections of poly that are deposited on the surface of the silicon (above the top of the trench poly) to provide a bridge between the trench poly and the metallization layer. One prior approach is to mask these bridge regions during the poly recess etch, such that they remain on the surface and can be used for contact regions. If the same oxide layer that forms the trench gate oxide is used to isolate these bridge regions from the substrate, the oxide under the bridge regions is quite thin and limits the yield and reliability of the device. Another prior approach relies on an additional poly layer deposited above the trench poly in the bridge areas. This approach generally provides a thicker oxide layer under the poly bridge for improved reliability, but it requires more process complexity and may reduce the product yield due to the process margin requirements introduced by the additional process steps.
Moreover, the use of a surface poly bridge layer degrades the overall planarity of the device and makes monolithic integration of other devices more difficult.
Therefore, it is a goal of this invention to provide improved LTDMOS device designs and methods of manufacturing that have simplified processing, greater planarity, and reduced weak oxide areas compared to the prior art.